Automatic BGA IC Reballing
1. DH-A2 can reball BGA IC chip with high successful rate. 2. Originally designed and made in China. 3. Factory location: Shenzhen, China. 4. Welcome to our factory to test our machine before placing orders. 5. Easy to operate.
Automatic Optical BGA IC Reballing Machine
1.Application Of Automatic Optical BGA IC Reballing Machine
Work with all kinds of motherboards or PCBA.
Solder, reball, desoldering different kind of chips: BGA,PGA,POP,BQFP,QFN,SOT223,PLCC,TQFP,TDFN,TSOP, PBGA,CPGA,LED chip.
2.Product Features of Automatic Optical BGA IC Reballing Machine
3.Specification of Automatic Optical BGA IC Reballing Machine
4.Details of Automatic Optical BGA IC Reballing Machine
5.Why Choose Our Automatic Optical BGA IC Reballing Machine?
6.Certificate of Automatic Optical BGA IC Reballing Machine
UL, E-MARK, CCC, FCC, CE ROHS certificates. Meanwhile, to improve and perfect the quality system, Dinghua has passed ISO, GMP, FCCA, C-TPAT on-site audit certification.
7.Packing & Shipment of Automatic Optical BGA IC Reballing Machine
8.Shipment for Automatic Optical BGA IC Reballing Machine
DHL/TNT/FEDEX. If you want other shipping term, please tell us. We will support you.
9. Terms of Payment
Bank transfer, Western Union, Credit Card.
Please tell us if you need other support.
10. How DH-A2 Automatic BGA IC Reballing Machine work?
11. Related knowledge
About flash chip
Flash chip determinants
Number of pages
As mentioned earlier, the larger the page of the larger capacity flash, the larger the page, the longer the addressing time. But the extension of this time is not a linear relationship, but a step by step. For example, a 128, 256 Mb chip requires 3 cycles to transmit an address signal, 512 Mb, 1 Gb requires 4 cycles, and 2, 4 Gb requires 5 cycles.
The capacity of each page determines the amount of data that can be transferred at a time, so a large-capacity page has better performance. As mentioned earlier, large-capacity flash (4Gb) increases the page capacity from 512 bytes to 2KB. The increase in page capacity not only makes it easier to increase the capacity, but also improves the transmission performance. We can give an example. Take Samsung K9K1G08U0M and K9K4G08U0M as examples. The former is 1Gb, 512-byte page capacity, random read (stable) time is 12μs, write time is 200μs; the latter is 4Gb, 2KB page capacity, random read (stability) time 25μs, write time It is 300μs. Suppose they work at 20MHz.
Read performance: The read steps of NAND flash memory are divided into: send command and addressing information → transfer data to page register (random read stable time) → data transfer (8bit per cycle, need to transmit 512+16 or 2K+ 64 times).
K9K1G08U0M read a page needs: 5 commands, addressing cycle × 50ns + 12μs + (512 + 16) × 50ns = 38.7μs; K9K1G08U0M actual read transfer rate: 512 bytes ÷ 38.7μs = 13.2MB / s; K9K4G08U0M read a page Requires: 6 commands, addressing period × 50ns + 25μs + (2K + 64) × 50ns = 131.1μs; K9K4G08U0M actual read transfer rate: 2KB bytes ÷ 131.1μs = 15.6MB / s. Therefore, using a 2KB page capacity to 512 bytes also increases the read performance by about 20%.
Write performance: The write steps of the NAND flash memory are divided into: sending addressing information → transferring data to the page register → sending command information → data is written from the register to the page. The command cycle is also one. We will merge it with the address cycle below, but the two parts are not continuous.
K9K1G08U0M writes a page: 5 commands, addressing period × 50ns + (512 + 16) × 50ns + 200μs = 226.7μs. K9K1G08U0M actual write transfer rate: 512 bytes ÷ 226.7μs = 2.2MB / s. K9K4G08U0M writes a page: 6 commands, addressing period × 50ns + (2K + 64) × 50ns + 300μs = 405.9μs. K9K4G08U0M actual write transfer rate: 2112 bytes / 405.9 μs = 5MB / s. Therefore, using 2KB page capacity increases write performance by more than twice the 512-byte page capacity.
The block is the basic unit of the erase operation. Since the erase time of each block is almost the same (the erase operation generally takes 2ms, and the time occupied by the command and address information of several previous cycles is negligible), the capacity of the block will be directly determined. Erase performance. The page capacity of the large-capacity NAND-type flash memory is increased, and the number of pages per block is also improved. Generally, the block capacity of the 4Gb chip is 2 KB × 64 pages = 128 KB, and the 1 Gb chip is 512 bytes × 32 pages = 16 KB. It can be seen that within the same time, the former's rubbing speed is 8 times that of the latter!
I/O bit width
In the past, the data lines of NAND-type flash memories were generally eight, but from the 256Mb products, there were 16 data lines. However, due to controllers and other reasons, the actual application of x16 chips is relatively small, but the number will continue to increase in the future. Although the x16 chip still uses 8-bit groups when transmitting data and address information, the cycle is unchanged, but the data is transmitted in 16-bit groups and the bandwidth is doubled. The K9K4G16U0M is a typical 64M×16 chip, which is still 2KB per page, but the structure is (1K+32)×16bit.
Imitate the above calculations, we get the following. K9K4G16U0M needs to read one page: 6 commands, addressing period × 50ns + 25μs + (1K + 32) × 50ns = 78.1μs. K9K4G16U0M actual read transfer rate: 2KB bytes ÷ 78.1μs = 26.2MB / s. K9K4G16U0M writes a page: 6 commands, addressing period × 50ns + (1K + 32) × 50ns + 300μs = 353.1μs. K9K4G16U0M actual write transfer rate: 2KB bytes ÷ 353.1μs = 5.8MB / s
It can be seen that with the same capacity of the chip, after the data line is increased to 16 lines, the read performance is improved by nearly 70%, and the write performance is also improved by 16%.
The impact of the working frequency is easy to understand. The operating frequency of NAND flash memory is 20 to 33 MHz, and the higher the frequency, the better the performance. In the case of K9K4G08U0M, we assume that the frequency is 20MHz. If we double the frequency to 40MHz, then
K9K4G08U0M needs to read one page: 6 commands, addressing period × 25ns + 25μs + (2K + 64) × 25ns = 78μs. K9K4G08U0M actual read transfer rate: 2KB bytes ÷78μs=26.3MB/s. It can be seen that if the operating frequency of the K9K4G08U0M is increased from 20MHz to 40MHz, the read performance can be improved by nearly 70%! Of course, the above example is just for convenience. In Samsung's actual product line, the K9XXG08UXM, rather than the K9XXG08U0M, can work at higher frequencies. The former can reach 33MHz.